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The Joint Test Action Group (JTAG) is an electronics industry association formed in 1985 for developing a method of verifying designs and testing printed circuit boards after manufacture. In 1990 the Institute of Electrical and Electronics Engineers codified the results of the effort in IEEE Standard 1149.1-1990, entitled ''Standard Test Access Port and Boundary-Scan Architecture''. JTAG implements standards for on-chip instrumentation in electronic design automation (EDA) as a complementary tool to digital simulation. It specifies the use of a dedicated debug port implementing a serial communications interface for low-overhead access without requiring direct external access to the system address and data buses. The interface connects to an on-chip test access port (TAP) that implements a stateful protocol to access a set of test registers that present chip logic levels and device capabilities of various parts. The JTAG standards have been extended by many semiconductor chip manufacturers with specialized variants to provide vendor-specific features.〔(Randy Johnson, Steward Christie (Intel Corporation, 2009), ''JTAG 101—IEEE 1149.x and Software Debug'' )〕 ==History== In the 1980s, multi-layer circuit boards and non-lead-frame integrated circuits (ICs) were becoming standard and connections were being made between ICs that were not available to probes. The majority of manufacturing and field faults in circuit boards were due to poor solder joints on the boards, imperfections in board connections, or the bonds and bond wires from IC pads to pin lead frames. The Joint Test Action Group (JTAG) was formed in 1985 to provide a pins-out view from one IC pad to another so these faults could be discovered. The industry standard became an IEEE standard in 1990 as IEEE Std. 1149.1-1990〔Copies of (IEEE 1149.1-1990 ) or its 2001 update may be bought from the IEEE.〕 after many years of initial use. In the same year Intel released the first processor, the 80486, with JTAG which led to quicker industry adoption by all manufacturers. In 1994, a supplement that contains a description of the boundary scan description language (BSDL) was added. Further refinements regarding the use of all-zeros for EXTEST, separating the use of SAMPLE from PRELOAD and better implementation for OBSERVE_ONLY cells were made and released in 2001.〔(IEEE 1149.1-2001 )〕 Since 1990, this standard has been adopted by electronics companies world-wide. Boundary-scan is now mostly synonymous with JTAG, but JTAG has essential uses beyond such manufacturing applications. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Joint Test Action Group」の詳細全文を読む スポンサード リンク
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